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  • VLSID 2013 : 26th International Conference on VLSI Design

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    When:                                        Jan 5, 2013 - Jan 10, 2013

    Where:                                       Pune, India

    Submission Deadline:                  July 24, 2012

    Notification Due:                          Sep 7, 2012

    Final Version Due:                       Oct 1, 2012

    Camera-ready paper due:             1st October, 2012

    Categories:                                 VLSI   embedded systems

    Scope:

    The VLSI and Embedded Systems Conference is a joint conference serving as a forum for researchers and designers to present and discuss current topics in VLSI design, electronic design automation, embedded systems, and enabling technologies. The VLSI and Embedded Systems Conference will have two days of Embedded Systems Conference will have two days of tutorials followed by three days of regular paper sessions, special sessions, and embedded tutorials. Industry presentation sessions along with exhibits, panel discussions, Design Contest, and Education Forum round off the VLSI and Embedded Systems Conference program.

    Call For Papers :

    This joint conference is a forum for researchers and designers to present and discuss current topics in VLSI design, electronic design automation, embedded systems, and enabling technologies. Two days of tutorials will be followed by three days of regular paper sessions, special sessions, and embedded tutorials.

    Industry presentation sessions along with exhibits, panel discussions, Design Contest, and Education Forum round off the program.

    Green Technology - A New Era for Electronics, which explores the ability of VLSI and embedded circuits and systems to positively impact the environment. Example areas under the theme include (but are not restricted to) designing energy-efficient VLSI circuits, improving the efficiency of energy-hungry applications such as data centers, developing intelligent monitoring and control systems such as smart grids, and using integrated circuits or embedded systems to leverage novel green technologies.

    Topics include (but are not restricted to):

    Embedded Systems :

    Embedded system hardware/software co-design; Reconfigurable hardware design; Embedded software; Real-time operating systems; Middleware

    and virtualization; Embedded multicores and manycores; Communications; Encryption, security, compression; Hybrid systems-on-chip; Sensor

    networks; Programmable devices; Hardware-software coverification; Embedded system reliability; Embedded applications (automotive,

    mobile,medical, etc.), platforms, and case studies.

    Digital Design :

    Low-power design; Asynchronous design; Package and board design.

    Analog/RF Design: Low-power design; Analog, mixed-signal, and RF systems; Package and board design.

    System-level design methodology; Gigascale design methodology; Multicore systems; Processor and memory design; Concurrent interconnect;

    Networks-on-chip; Defect tolerant architectures.

    Logic Synthesis and Physical Design :

    Logic synthesis; Technology mapping; Asynchronous synthesis; Physical design; Floorplanning; Placement; Routing; Clock Design; Layout issues in

    design for manufacturability.

    Test and Reliability :

    Fault modeling/simulation; ATPG; DFT; Delay test; Fault-tolerance; Online test; AMS/RF test; Boardlevel and system-level test; Silicon debug,

    postsilicon validation; Memory test; Reliability test.

    Functional Verification :

    Behavioral Simulation; RTL Simulation; Coverage Driven Verification; Assertion Based Verification; Gate-level simulation; Emulation; Hardware

    Assisted Verification; Formal Verification; Equivalence Checking; Verification Methodologies.

    Device/circuit simulation and modeling :

    Design verification; Signal integrity; Technology modeling-design-simulation; Analog/mixed-signal simulation; Multi-domain simulation; Numerical

    Emerging Technologies :

    Issues in nano-CMOS technologies; MEMS; CMOS sensors; CAD/EDA methodologies for nanotechnology; Non-classical CMOS; Post-CMOS devices;

    Biomedical circuits and systems.